Digital Systems Laboratory

Year
1
Academic year
2022-2023
Code
01019349
Subject Area
Digital Systems and Computers
Language of Instruction
Portuguese
Other Languages of Instruction
English
Mode of Delivery
Face-to-face
Duration
SEMESTRIAL
ECTS Credits
6.0
Type
Compulsory
Level
1st Cycle Studies

Recommended Prerequisites

No prerequesites.

Teaching Methods

Lecture classes with detailed presentation of the concepts, principles and fundamental theories and solving of basic practical exercises that exemplify its application to real cases.

Laboratory classes with tutorial style assigments of growing complexity, from simple combinational circuits to sequential circuits for a vending machine and a programmable processor. Reconfigurable logic (FPGA) boards are used, and an initial assigment uses a breadboard and TTL components. Schematic design is complemented with VHDL used in some simple modules or for full controllers.

Learning Outcomes

The key objective is to provide basic concepts and skills for the design of small digital systems, and the laboratorial experience on the design of digital systems using fast prototyping tools. At the end students will be able to design combinational and sequential digital systems, using standard logic and VHDL modules, and implement them on reconfigurable logic systems. The aim is not only to provide the basic skills for the design of small digital systems, but also gives students a low level understanding of digital systems, that will be important not only for future digital design but also provide better insights for computer architecture and software developers.

The course objectives and planned work lead the students to Acquire competencies in synthesis and analysis, written communication, problem solving, critical reasoning, autonomous learning, and practical application of theoretical knowledge.

Work Placement(s)

No

Syllabus

1. Introduction to Digital Systems.

2. Combinational Logic Design.

3. Sequential Logic Design: Controllers.

4. Hardware Description Languages (HDL): VHDL.

5. Datapath Components.

6. Register-Transfer Level (RTL) Design.

7. Optimizations and Tradeoffs.

8. Physical Implementation: SSI IC's, ASIC's, FPGA's, PLD's.

9. Introduction to Programmable Processors.

Head Lecturer(s)

Jorge Nuno de Almeida e Sousa Almada Lobo

Assessment Methods

Assessment
Exam: 40.0%
Laboratory work or Field work: 60.0%

Bibliography

Bibliografia principal / key bibliography

•Frank Vahid, (2007)  Digital Design, John Wiley and Sons. (second edition in 2011)

•Jorge Lobo, (2019) Slides das aulas de Laboratório de Sistemas Digitais.

•Frank Vahid, Roman Lysecky, (2007) VHDL for Digital Design, John Wiley and Sons.